RRAM variability and its mitigation schemes

Emerging technologies such as RRAMs are attracting significant attention due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. However, critical causes of hardware reliability failures, such as process variation due to their nano-scale structure have gained considerable importance for acceptable memory yields. Such vulnerabilities make it essential to investigate new robust design strategies at the circuit system level. In this paper we have analyzed the RRAM variability phenomenon, its impact and variation tolerant techniques at the circuit level. Finally a variation-monitoring circuit is presented that discerns the reliable memory cells affected by process variability.Peer ReviewedPostprint (author's final draft

Memristive crossbar memory lifetime evaluation and reconfiguration strategies

Among the emerging technologies and devices for highly scalable and low power memory architectures, memristors are considered as one of the most favorable alternatives for next generation memory technologies. They are attracting great attention recently, due to their many appealing characteristics such as non-volatility and compatibility with CMOS fabrication process. But beside all memristor advantages, their drawbacks including manufacturing process variability and limited read/write endurance, could risk their future utilization. This paper will evaluate the impact of reliability concerns in lifetime of memristive crossbars and will present the design basis of two proposed reconfiguration approaches in memristive crossbar- based memories, in order to extend the system lifetime by utilizing available resources in an intense way and without need of failure recovery. It is observed that the adaptive reconfiguring approach can improve the crossbar reliability and extend its lifetime up to 65% in comparison with non-adaptive reconfiguration strategy.Peer Reviewe

Memristive crossbar memory lifetime evaluation and reconfiguration strategies

Among the emerging technologies and devices for highly scalable and low power memory architectures, memristors are considered as one of the most favorable alternatives for next generation memory technologies. They are attracting great attention recently, due to their many appealing characteristics such as non-volatility and compatibility with CMOS fabrication process. But beside all memristor advantages, their drawbacks including manufacturing process variability and limited read/write endurance, could risk their future utilization. This paper will evaluate the impact of reliability concerns in lifetime of memristive crossbars and will present the design basis of two proposed reconfiguration approaches in memristive crossbar- based memories, in order to extend the system lifetime by utilizing available resources in an intense way and without need of failure recovery. It is observed that the adaptive reconfiguring approach can improve the crossbar reliability and extend its lifetime up to 65% in comparison with non-adaptive reconfiguration strategy.Peer Reviewe

Resistive random access memory variability and its mitigation schemes

The need for design of new computing and storage paradigms has leaded to the emergence of new technologies and procedures. Among these technologies, emerging non-volatile memories such as RRAMs are getting intense attention due to their attractive characteristics such as scalability and CMOS friendly manufacturing. However, similar to any other new technology emergences, having reliability and high performance devices is a challenge, and innovative new techniques are required to make the products attractive and robust enough before entering into the semiconductor market. The research for such crucial reliability concerns and mitigation techniques are ongoing hot topic and the main motivation for this work. Therefore, in this paper, we have studied the origins of RRAM variability and reviewed some of the existing techniques to mitigate its effect at circuit level. To show the relevance of variability in RRAM memories we have further analyzed its impact in the Read/Write memory operation and have presented the memory unreliability that we measure by a parameter as probability of error can be 25% during the read operation and in presence of such resistance variations. In the next phase we have presented a conventional 1T1R memory architecture where we have proposed our reconfiguring strategies to extend the memory lifetime. These reconfiguration strategies utilize a monitoring technique, what we have implemented in order to measure the resistance ratios in RRAM memory cells. Such monitoring approach can detect the highly variability effected and differentiate the bad cells from the good cells; therefore, it can improve the overall RRAM memory reliability.Peer ReviewedPostprint (author's final draft

RRAM variability and its mitigation schemes

Emerging technologies such as RRAMs are attracting significant attention due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. However, critical causes of hardware reliability failures, such as process variation due to their nano-scale structure have gained considerable importance for acceptable memory yields. Such vulnerabilities make it essential to investigate new robust design strategies at the circuit system level. In this paper we have analyzed the RRAM variability phenomenon, its impact and variation tolerant techniques at the circuit level. Finally a variation-monitoring circuit is presented that discerns the reliable memory cells affected by process variability.Peer Reviewe